"Chip designers are under so much pressure to deliver ever-faster CPUs that they’ll risk changing the meaning of your program, and possibly break it, in order to make it run faster"
Uh huh. Let me know when that happens.
Uh huh. Let me know when that happens.
Architectures like the late lamented Alpha (this is around late 90's) had fairly weak ordering requirements so you needed explicit memory barriers to tell the processor that you needed ordering preserved (think spinlocks for instance.) Mainstream processors (x86/x86-64) have always had strict write ordering but not read ordering. Let's see how long that lasts.