A working, transistor-scale replica of the MOS 6502 microprocessor | Hacker News Reader

A working, transistor-scale replica of the MOS 6502 microprocessor

monster6502.com

335 pointscmod44 comments

Great job guys, and this project really brings back some cobbed-web memories.

One of the first software projects I ever developed was a real microcode/bus simulation of the 6502 for a required CP class I took what seems life lifetimes ago. I remember the prof telling the class that if anyone was interested in a project where they didn't have to come to class and still get an A, talk to him after class.

Sure I'll go for that I thought...who wants to sit in a boring class when you can create.

So I built the opcode simulator, which took the individual bits on the various internal busses and propagated them through the "chip", on a pretty kickass Atari ST that I owned, which at the time (1985 or so) represented cutting edge PC technology. What I remember most about it was finding a bug in the damn Turbo-C (or whatever I can't remember exactly) compiler I was using that, in some cases, always gave the output of "50" during an bin-to-hex conversion or something.

I did everything I could to try to fix this bug, but no matter what it kept popping up, fouling up the results of my otherwise slick simulation. I was terrified to show the prof, but he was relatively impressed with my use of a PC instead of the school's timeshared VAX and totally disregarded the bug after reviewing my code.

And yes...I got my A. I sure wish I still had that program.

Mark Williams C - https://en.wikipedia.org/wiki/Mark_Williams_Company

In reading the linked article the founder is Aaron Swartz's dad.

It's cool just for the blinking lights alone. Computers are so boring these days, at least from my growing up with 60-70s SciFi.

It'd be cool to build a blinken lights bus expander for the C64, or other 8-bit computers of that era. Complete with switches for data and register access, like a PDP or Altair.

Mark Williams C?

You wouldn't see much, though, would you? It's nice to look at here because of the very slow clock speed. At 2MHz, I expect it would just be like looking at dimly lit LEDs.

> At 2MHz, I expect it would just be like looking at dimly lit LEDs.

Maybe. Or maybe other patterns would emerge - some LEDs would be dimmer, some brighter, then the pattern would change, as the program progresses. Let's try it.

It's a shame they didn't mimic CMOS construction instead of NMOS. A 65C02 made from discrete parts could have run at full speed, wouldn't have required dual-gate MOSFETs or other weird parts, and could have plugged right in to the original 6502 microcomputers.

As a bonus, it could have operated statically -- not clear if this one can or not, but I'd guess not, if they were truly faithful to the original 6502 schematic.

Still a cool hack, though!

AFAIK no one has reverse-engineered the 65C02 publicly, so that would have to be done first; it'd also require approximately twice the number of transistors and area, so the speed won't be much better.

The speed will certainly be better, due to the way NMOS works.

NMOS is pretty terrible.

> No. The MOnSter 6502 is relatively slow compared to the original, thanks to the much larger capacitance of the design. The maximum reliable clock rate is around 60 kHz. The primary limit to the clock speed is the gate capacitance of the MOSFETs that we are using, which is much larger than the capacitance of the MOSFETs on an original 6502 die.

60 kHz? Surely these MOSFETs can do better than that! And even simple modern PCBs can run at much higher speeds.

Anyway, at this speed, I can probably run it in a full SPICE simulation on my PC and still outperform it :)

> 60 kHz? Surely these MOSFETs can do better than that! And even simple modern PCBs can run at much higher speeds.

Any single MOSFET can. The slow clock is due to propagation time across multiple MOSFETs.

NMOS logic is made from a passive pull-up resistor on top of an active pull-down network. An NMOS gate can switch from high to low very quickly, because the pull-down network connects the output to ground via only its very small on-resistance. The input capacitance of the subsequent gate discharges through that small resistance quickly. But NMOS switches from low to high much slower, because that gate capacitance has to charge through the higher resistance of the pull-up resistor. The pull-up resistance has to be relatively high, because otherwise the voltage would be divided roughly evenly when the pull-down network is turned on, which means the output voltage would be in the undefined region between low and high and the gate wouldn't work. There's also a trade-off between pull-up resistance and power consumption, with a stronger (lower resistance) pull-up using more power.

With CMOS, both the pull-up and pull-down parts are active, so one can be switched on while the other is off. There's always a low resistance path to Vdd or ground, and the subsequent gate capacitance can both charge and discharge quickly. The drawback is that it's harder to manufacture a chip with both N-channel and P-channel transistors.

The 6502 chip design used precharging for exactly that reason. You precharge to Vdd in phase 1 through a path with high drive strength and then in phase 2 only the fast pull-down network has to do any work if needed. The pull-up network is still there to prevent floating and hence needs to be ratioed against the pull-down on-resistance to pass a strong 0, but the pull-up resistance no longer sets the low-to-high switching time. The main limitation is that it can only handle monotonic logic, so you may need to interpose static inverting logic stages between your precharge logic stages.

And in standard chips nowadays, you can still find transmission gate logic (complementary pass transistors so you can pass both strong 1s and strong 0s), pseudo-NMOS logic (using a boring old enhancement mode PMOS transistor tied off to ground as a pull-up resistor) and domino logic (precharge logic with interleaved CMOS stages) in critical datapath circuits, so even in a bog standard CMOS process there's room for trickery.

> The drawback is that it's harder to manufacture a chip with both N-channel and P-channel transistors.

Yeah, and CMOS wasn't competitive for higher speed chips until the 80s (the 68000 was NMOS based until 1985 and some higher end processors eschewed MOS and used bipolar ECL). CMOS had been around for a good while at that point but was mainly used for applications like battery-powered watches and calculators where static power draw was more important than speed. The 65C02 (a CMOS version of the 6502 with a few other features thrown in) came out in 78 and was competitive in speed to the original 6502, though it was originally designed for a customer for use in calculators, but of course ended up being used in numerous home computers.

Someone did try using SPICE to simulate the 6502, and it was much slower than the real hardware:

http://forum.6502.org/viewtopic.php?t=1768

it took about 30 mins to run through reset and then 20mins to do 10 cycles of instructions.

That's to be expected. Transient SPICE analyses can become really slow for larger circuits (couple real-ps/CPU-s for analog circuits that work with a few dozen MHz).

One of the neat things about this is that it shows just how much of a technological leap integrated circuits and micro-processors were. Back in the 1950s all processors were built with individual transistors, even in the 1960s they were primarily built in the same way, with any use of integrated circuits only ganging together a small handful of transistors onto a single chip. Except today we have tremendous advantages in being able to build multi-layered printed circuit boards using layouts created on computers while placing the components automatically using pick and place machinery. The MOnSter 6502 would be a marvel of miniaturization for the 1960s and yet it relies on 21st century technology to attain a size of only 7000x the original 1975 part. And as they point out, more modern chips that were built only a few years later like the 68k (built in 1979) would translate to enormous board dimensions (19 square feet). So much of our world is built on the technology of microprocessors, it's easy to take it for granted.

It's really neat that you can visibly see the bits of the PLA sequencer ROM across the top thirdish just like you can in 6502 die shots.

I know it would be a major undertaking but I can't help but think that building a similarly dis-integrated but complete computer would be a really interesting project.

You mean the Megaprocessor? http://www.megaprocessor.com/index.html

Well sort of but scale is different, yeah?

What do you mean by that?

The MOnSter 6502 is using surface-mount parts, which are quite a bit smaller than the individual gate boards used in the Megaprocessor.

> How big would the MOnSter 6502 be if it were made with through-hole parts instead of surface mount parts?

> About 19 square feet (1.7 square meters).

I love the last picture on that page. Obviously this thing is nowhere near the spec required to run Windows 7 (I doubt it would even handle DOS) but it's fun to think about!

Got a laugh out of this:

How big would a 68000 microprocessor be at the scale of the MOnSter 6502?

Also about 19 square feet (1.7 square meters).

Are you going to make a 68000 next?

No.

One wonders whether he is making a Dark Tower joke there.

I wonder why this is so expensive to build - is the board too huge for common pick-and-place machines or solder ovens?

That board would have fitted fine in the old SMT pick and Place machine and solder reflow oven I used to use in around 1998 - 2004.

I think the cost is driven by this being a one off project. That makes one off costs (programming the pick and place machine; profiling the board in the oven; making solder stencil screens; PCB artwork etc) more expensive. I know the costs of these have dropped considerably since I was doing this stuff (2000), but they still add up.

It also means that you don't get economies of scale when buying components. It's usually cheaper to just buy reels of 5000 components than to buy a couple of hundred. (And it makes handling them much easier if you're using a machine to place them!!)

I estimate it would cost around $300-500 to get assembled depending on volume. That's just the assembly price. This is based on some online quotes with 15k pads (I checked 25-100 boards).

Then you have actual BOM cost which is maybe another $150-200. A 2N7002 is about $0.02 even at 100k volume. Resistors and small passives are often free, and the remaining bits are cheap.

The board is probably $100 each in small volume. Big four layer beast, not cheap.

I used www.7pcb.co.uk and Mouser/Farnell for prices.

So we're looking at a cost of up to $700-800 plus taxes and shipping. That's without any kind of profit for the designer, distributor cuts and so on. At $1k they're breaking even, $2-3k would be standard markup to cover overheads etc.

Ah, okay. I thought it 'd be more like a typical PC motherboard with the hundreds of tiny components and iirc a dozen layers.

So basically, when I understand you correctly, a PC motherboard is only as cheap as it is due to scale advantages and lots of the parts on a motherboard being resistors etc.?

Motherboards are cheap almost solely because of scale - they're sold by the tens of thousands, if not hundreds of thousands. They're also sold at a much lower margin (I would imagine). They also benefit from having an in-house production chain, e.g if you're Foxconn you have an entire city working just for you. As a hobbyist you need to pay someone else to make things for you (and pay their salaries +overheads too).

My comment about resistors was that most assembly houses will give you certain components for free because they're an insignificant fraction of the price. Also because almost every digital PCB will use e.g 0.1uF capacitors, they can buy enormous quantities. If you look at the link below you see that most of the cost is in the few specialised parts like the North/southbridge, sound card and connectors.

Here's a teardown and BOM analysis for a motherboard: http://electronics360.globalspec.com/article/3280/asus-p5kpl... . Note the BOM cost is essentially the sale price.

This is partly why Apple's stuff costs so much, because they actually price their devices reasonably (from a business sense). Everyone else works on razor thin margins to give you the illusion that hardware is cheap.

I agree with your estimate.

Perhaps also add testing costs in there. With that many components one would have to do some some or all of... flying-probe, automated optical inspection and functional testing. The testing alone would have significant setup costs in the thousands of dollars, that get small when amortized over MANY units (but I seriously doubt there will be more than a few made of these!). Given that this is an actual CPU, functional test is going to be fairly complex.

Really glad that someone has taken the time to do this project, it is effectively a work of art or an interesting discussion piece.

You can see this in person at the Bay Area Maker Faire today. Now someone hook this up to a BEEB and run those decryption cycles at the beginning of Elite. Web: http://itvstream.info/

Finally. Now someone hook this up to a BEEB and run those decryption cycles at the beginning of Elite.

Saw this beauty at the Vintage Computer Festival last Fall in Silicon Valley. These guys are awesome:

http://www.evilmadscientist.com

You can see this in person at the Bay Area Maker Faire today.

How big would the equivalent Kaby Lake device be?

In the FAQ they compared to an Apple A8X and noted it would be 885,000 square feet if built in similar fashion.

That's incredible. For anyone who doesn't think in terms of square feet, that's a square with a 270 meter edge.

No, that's perfectly credible. What is incredible is that the real thing actually exists!

Ok, it doesn't work int the Apple ][ because of timming, but could it work connected to an Atari 2600?

Even worse; the 2600 CPU must run at exactly 1/3 the pixel clock.

A 2600 is impossible. Everything must run at the colorburst derived clock.

One could put this in an apple 2 with the clock divided down.

The Apple video hardware runs independent of the CPU.

Would be super slow, but functional.

At 60khz, the monitor would be responsive on the order of seconds.

Wow, that's just gorgeous

It is. I'm very impressed by the attention to detail and neatness in the visual presentation of this project.

Reply on news.ycombinator.com