The point is that if you want to use the ARM ISA you have to pay ARM. Not so with RISC-V. Anyone is free to fab a RISC-V chip without paying royalties.
The point is that if you want to use the ARM ISA you have to pay ARM. Not so with RISC-V. Anyone is free to fab a RISC-V chip without paying royalties.
They want to avoid the Intel scenario, where a company controls an ISA that industries depend on, and can force their ideology on implementing silicon for whatever ends they want.
ARM, being proprietary and controlled by the company can do the same. If you want a specific part built, you need the permission of ARM to do anything involving the ISA.
If you are going to build all civilization on the top of an ISA, it can't be reasonable to subjugate that ecosystem to the whims of one board of directors.
RISC-V is just a document, is not an implementation. There are many costs involved into designing a CPU that end up costing much more money than paying a license fee.
Check this comment: https://news.ycombinator.com/item?id=14284450
Most people on HN should understand the difference between an ISA specification and its implementation in silicon.
The second like you showed is just a simple FPGA implementation, you can't really use for ASIC designs.
The first one is a completely different implementation by a different company. And they are not really providing the whole source. I challenge you to find a place to download their designs yourself. I will be waiting.
Only RISC-V ISA and some simple (and relatively inefficient) architectural designs are free and without royalties.
But when someone develops efficient RISC-V microarchitecture they are not going to provide it free. If some company develops RISC-V based architecture that is competitive with AMD,Intel or ARM, they are going to ask good money for it.