It is really, really, really going to depend on the design in question. But, in short: probably not.
If you are creating some design that is essentially agnostic of the underlying peripherials, just generic, reusable RTL -- for example, perhaps you will write a CPU core, like picorv32, or softusb-navre -- then the same RTL will, in fact, work just fine, just about anywhere. Provided you don't use some vendor/device specific code, naturally.
But that isn't normally what you do. A CPU core by itself is worthless unless it's driving some on-board component.
The problem is when any actual peripherals are involved. Which is to say, "every realistic design you'd need to put on the F1 instance." Doing things like talking to an ethernet controller or PCIe bus, in practice, is going to vary immensely based on the board, controllers, and design you're implementing, in practice. Furthermore, boards are going to have their own quirks and errata, etc. A lot of the work is spent just on dealing with the hardware.
For example, the Arty does not have DDR4, but DDR2, much less ECC RAM. Probably need a different SDRAM controller. No PCIe, so you don't really have an option for a PCIe bridge with the Arty, so it's impossible to even experiment here.
There are other things. As an example, FPGAs come with tiny pieces of RAM called "BlockRAMs", which are available to the logic, spread out over the device, independent of any other memory. But, the FPGA in the F1 has an even better component -- UltraRAMs, with more space and "input" ports -- that aren't available on older devices. So you cannot use or test the impact of these components easily. In practice, this is all incredibly important as it will impact the power usage and timing of your design. (BRAMs are a very important resource to utilize effectively.)
This isn't to say it's all a waste of time, and you do it over and over. The cost of a port to a new board will definitely be amortized, by having support for an existing board in place, and having a working, tested design. But the F1 is a high-class piece of hardware that would be extremely hard to replicate in practice for anyone working independently. And you have to spend a lot of time with the hardware. So it's going to be difficult to actually make sure everything works coherently without spending a boatload of money.
The only device in a similar class I can think of, which is also the most affordable UltraScale+ device I know of that doesn't require $4000 for Vivado, is the new UltraScale+ Zynq SoC available from Avnet. For "only" $700 USD for a SoC + carrier card: http://microzed.org/product/ultrazed-EG
An ARM+FPGA device is still a much different beast. But it's a lot closer to what the F1 is, in some senses.