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Comment by agumonkey | Hacker News Reader

My pretentious 2 cents: check out Moore Forth CPU, his greenarrays are either memory or processors depending on your view. It makes the issue disappear in a way. It's also madenningly beautiful to program since each memcessor can send/receive closures from neighbors. There's a talk from Moore on this on youtube.

ps: also mostly clockless and microwatt range

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I've always admired the Sh-Boom. Ahead of its time and hence the subject of a lot of patent litigation when time caught up.

https://www.dnd.utwente.nl/~tim/colorforth/PTSC/IGNITE_Proce...

Faster than clock processing before that was a thing.

https://patents.google.com/patent/US5440749A/en

where were you all my life

What are some practical things done with GA's chips? (My own belief is that almost nothing can be done with them but I'm always glad to be surprised, certainly with something like this where the chip itself is a masterpiece of circuit design shunning every convention of the art.)

Beside inspiring the shit out of me I have no idea. You have to trust a tad my internal feeling for beauty. If I could I'd ask Moore directly, he surely had very practical applications since he created Forth chips (I remember CAD and VLSI projects).

That's the thing with these guys, you're never sure if they're insane or just that the world doesn't tune enough to their ideas.

It seems like an systolic array architecture using Forth processors as the processing nodes. Good for some things like neural networks like Google is doing with their own chips. There is also Parallela which was on Kickstarter. But I'm not sure if Moore is doing anything fundamentally new unless their compiler can automatically convert a conventional program into systolic array form?

Moore is also quite old (80), I'm even worried about his passing from time to time. So I suppose he's not doing much ambitious things but enjoying himself.

Parallela has managed to conduct a very succesful KickStarter. They've been under the radar since but still active, they published new plans for 1000 core coprocessor array. And I suppose, now they've proved themselves alone, they won't stop soon.

You might want to check out "A Systolic Array Optimizing Compiler" -> https://books.google.com/books?id=6nTjBwAAQBAJ&lpg=PA188&ots...

Systolic array/vector processors have been used since the late 60's for neural and other gemm heavy workloads. The Warp architecture from CMU is an excellent example.

Imagine a complex prolog search (great for stuff like natural language processing and program optimization), with the non-deterministic clauses spread through those nodes, and collecting the true ones on the later stage processors.

Well I mean aren't they basically just an 18-bit transputer? I don't know if there's anything they'd excel at that you couldn't get from a more familiar architecture but people figured out how to do things on transputers.

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