Hacker News Reader

Comment by make3 | Hacker News Reader

"The TPU only operates on 8-bit integers" The 8 bit part is fine, but integers? what the hell. that's a new one for me

Anecdotally, it seems most models can be quantized to 8 bits without much loss of accuracy, and fixed point arithmetic requires much less hardware. Training is still done with floating point though.

This, when you get right down to it a lot of models do fine with only 256 unique weights.

Yeah...you could implement 16-bit multiplication/addition as two 8-bit multiplications plus carry... so worst case, if you want 16-bit multiplies, you implement it yourself

Four multiplications, not two (three if you only need the low 16b of the result).

You can get the full 32-bit result in only three multiplications using https://en.wikipedia.org/wiki/Karatsuba_algorithm , but it requires more additions.

Yeah, in practice Karatsuba isn't a performant option for small operands unless your multiplier is catastrophically slow. (And it still doesn't get you to two multiplications.)

Agreed - however as we progress I expect a comment like this to be akin to Bill Gate's 64K comment.

Almost certainly, and depths would have to increase. Like all series expansions the coefficients on later terms have less and less impact so their dynamic range is less and less important to the final value. But the dynamic range on the initial terms is proportionately important. I expect the dynamic range of the weights will turn out to be logarithmic with respect to overall depth of the network.

The brain appears to spend about 4.7 bits per synapse (26 discernible states, given the noisy computation environment of the brain); so it seems to be plenty enough for general intelligence. This could, of course, merely be a biological limit and on silicon more fine-grained weights might be the optimum.

Here is another paper demonstrating very good results with just 6 bit gradients: https://arxiv.org/abs/1606.06160

Indeed, any 8-bit x 8-bit function with an 8-bit result is just a 64KiB look-up table.

There are hints that even less than 8 bits per weight might be usable (for certain cases and on custom hw). Not sure if it's practical but it is definitely interesting.

https://arxiv.org/pdf/1502.02551.pdf

https://arxiv.org/pdf/1610.00324.pdf

I wanted to have some basic idea about hardware so I did some "research" (googling) and ended up giving a short informal talk. My slides with some links are here:

http://ml.kjx.cz/hw4nn2017.pdf

I imagine that once they've trained the floating-point models, they'll then quantize them into integers to make inference faster. It's not something I've done, but I imagine that the limited range of the of integers may cause problems (though they say in the paper that the 16-bit product can be accumulated to something that's 32-bit). The features to do this will be coming fairly soon to regular TensorFlow too.[1]

[1] https://youtu.be/0r9w3V923rk?list=PLOU2XLYxmsIKGc_NBoIhTn2Qh...

Nvidia has shipped a couple of INT8 inference cards as well:

http://www.anandtech.com/show/10675/nvidia-announces-tesla-p...

Yes, how do they perform? Linked article cites 47 TOPS on 8 bit integer arithmetic and they are useful for training too.

Take a look at Google's gemmlowp low-precision GEMM library:

https://github.com/google/gemmlowp

(Used in tensorflow)

Note however, that on Intel it's actually slower than run off the mill float32 linear algebra library like Eigen or OpenBLAS. Its main forte seems to be ARM.

Reply on news.ycombinator.com