The Min-T Processor
nanocpu.org
nanocpu.org
- CPU does not contain program counter: instead, a regular binary counter counts PC from 0 to max program ROM, then wraps. You can clear OEN bit to turn write operations into no-op's. (For an advanced usage, you have JMP and RTN instructions which just set corresponding pins. It is up to you to wire something to them.)
- CPU does not contain instruction decoder: instead, some bits from program ROM are wired to address bus. For example, 16-bit wide ROM will be split into 4 bit instruction and 12 bit memory address. Max amount of RAM supported depends on your ROM's width. RAM is bit-addressable. There is no indirect RAM access (unless you implement it yourself).
- CPU does not contain wide registers: you get one data bit, one result bit, and two flags, for 4 bits of state total.
- CPU does not contain ALU: you can do AND/OR/XOR, optionally inverted -- so just a single bit LU unit.
This machine is not Turing complete at all (2), but it is still possible to implement basic arithmetic, as well as simple games such as "pong".
(1) I am ignoring all other requirements here, like clear layout and educational value.
(2) Strictly speaking, no real machine is Turing complete, because Turing machines require infinite memory. But this machine is super bad because it has no indirect memory access at all.
I can't tell if you mean it's awesome, or terrible.
I find his diagrams and narrations extremely clear and straightforward. I've been using it as a chance to learn more about digital logic, and hobbyist electronics. For example, I've been (very slowly) learningttfdfd KiCad by translating Mr. Eaters designs into KiCAD form so they can be manufactured as dedicated boards. I finally got the first module, the clock module, correct and manufactured, and you can find the designs here: https://github.com/lelandbatey/clock-module
Here's the clock module on the printed PCB with all the components, and only one bodge wire needed (now fixed in the design): https://s16.postimg.org/gxi0plptv/2017-03-26_15.51.00.jpg
[0] https://www.amazon.com/Digital-Computer-Electronics-Albert-M...
However the "Min-T" name to me implies a higher ambition than "just" implementing a transistor computer. True minimalism requires exacting definitions and metrics. That could be pretty interesting, but keeping memory outside the definition is in a sense cheating as [the size and speed of] random access memory was a key differentiators between early computers (ENIAC era).
Essentially, this design would be facing the same constraints as _early_ computers, so I would expect the solution to look similar: micro-coded bit-serial design, Rope memory for ROM, and core memory for "ram". I'd look to the HP-1900A for inspiration.
absolutely useless excercise, aside from being a fun way to spend some time.