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>ECC should be a standard feature. If you don't want it you don't have to use it but to disable simply for market segmentation is lame.

I agree ECC should be a standard feature, but it follows the same marketing patterns (in that industry) as disabling multi-processor support or artificially limiting clock speeds.

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I think ECC is in a different category than MHz or core count because with a lower frequency or fewer cores you may get your result slower but it will be the same result as a top end chip.

Without ECC you may get a completely wrong answer when the increasingly small, vulnerable, and numerous dram cell is flipped.

Actually no, enabling external cache coherency (eg. QPI) incurs a significant cost in terms of pin count, power, die space and clock speeds. The same does not transfer to ECC memory.

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