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Comment by ajross | Hacker News Reader

The serious answer might be that a hardware RISC-V deployment is very unlikely to be running Fedora in production. All the existing planned devices are MCUs which are much too small (and lack MMUs in many cases).

The more glib one is that if you're interested in building a CPU emulator from source but don't want to rebuild a kernel, you're probably skipped a few important skills along the way.

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Fedora is targeting 64 bit server-class hardware, which is on its way -- in production as we speak.

I'm quite capable of rebuilding the kernel, just lazy. The main problem is that the kernel is embedded in the bootloader, and the bootloader for this emulator is patched because the RISC-V HTIF [obsolete device] emulation is different from the other RISC-V implementations, which makes rebuilding the whole thing somewhat tedious.

> in production as we speak

Really?! Got a link? I thought the ISA was still in flux, isn't it a bit early to be making hardware?

Follow the links in: https://news.ycombinator.com/item?id=13213342 and have a look at the latest workshop proceedings: https://riscv.org/2016/12/5th-risc-v-workshop-proceedings/

The user-level ISA is fixed. The privileged-level ISA is in flux, but people obviously think there's enough there to make real hardware. To be fair the main problems with the privspec are to do with virtualization, and likely the first crop of hardware won't support that or will have only interim support.

At least one team is developing a not-tiny design with Linux in mind [1].

> BOOM supports atomics, IEEE 754-2008 floating-point, and page-based virtual memory. We have demonstrated BOOM running Linux, SPEC CINT2006, and CoreMark.

[1] https://www2.eecs.berkeley.edu/Pubs/TechRpts/2015/EECS-2015-...

There are workstation RISC-V machines in development.

Who is developing them?

SiFive.com seem to be closest to having 64 bit hardware. They came out with 32 bit hardware a few weeks back (which doesn't run Linux -- it's a sort of Arduino type board). LowRisc.org may have 64 bit hardware next year. There are a few others, best to see the recent conference talks for details: https://riscv.org/2016/12/5th-risc-v-workshop-proceedings/

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