Investigating 65c816 Interrupts

The interrupt sequence saves very little CPU state, leaving that to the IRQ handler, and the CPU doesn't appear to generate IRQ ACK signals. A linked page (http://wilsonminesco.com/6502interrupts/index.html) has a table (at the bottom) that lists various CPUs and IRQ latency.

Take a look at the chart in the article the other reply here posted. 7-14 clock cycles for 65c02, 8-18 clocks for the 65c816.

Versus the competition at the time: Z80 at 14-19 clocks, 8080 at up to 40 clocks, 68000 at 46 clocks.

Explains in some ways why, despite having abyssmal clock rates in comparison, an 8mhz 68000 machine like the Atari ST or Amiga or Macintosh could actually feel less responsive in some tasks than a classic 6502 home computer. Memory accesses were far slower, interrupt responses far slower, etc. They just made up for it in raw 16/32-bit integer performance, more memory, and a nice wide register set.

65816 interrupts take 7 cycles when emulating a 6502, 8 when native. z80 seems to take 11-19 depending on what kind of interrupt it is.

Of course, there's also an instruction to wait for an interrupt which takes 1 cycle to wake up after the interrupt.