And then there's this: http://www.macrumors.com/2016/10/28/macbook-pro-tb3-reduced-...
"MacBook Pro (13-inch, Late 2016, Four Thunderbolt 3 Ports) The two right-hand ports deliver Thunderbolt 3 functionality, but have reduced PCI Express bandwidth."
"MacBook Pro (13-inch, Late 2016, Four Thunderbolt 3 Ports) The two right-hand ports deliver Thunderbolt 3 functionality, but have reduced PCI Express bandwidth."
Apple could have solved this by connecting a PCIe switch to the root complex and attaching both Thunderbolt controllers below it, but that would have consumed additional energy. Alternatively they could have used a beefier CPU with more PCIe root ports on the CPU, but I guess those available would have been too energy hungry. Which kind of means this is Intel's fault for not providing a low-energy chip with enough PCIe root ports on the CPU.
I'm wondering what the situation is like on the 15" version with discrete graphics. This would require 3 root ports directly on the CPU to drive both Thunderbolt controllers and the GPU with full speed, I assume that's indeed the case since it's not mentioned in the document.
Another thing not mentioned in the document is that energy consumption will be suboptimal if one device is attached on both sides of the machine because it prevents one of the Thunderbolt controllers from powering down. One should connect both devices on one side to improve battery life.
Edit: On Skylake the PCH is apparently optional, the functionality is mostly integrated into the CPU, so the limitation is really the number of lanes provided by the CPU, and this wasn't sufficient to connect both Thunderbolt controllers with 4x. The CPUs used in the 13" model all have 12 lanes, the ones in the 15" model have 16 lanes. So for the top-of-the-line model this could be 4x for each of the Thunderbolt controllers, 4x for the GPU, 2x for the SSD, 1x for Wifi, 1x for HD Audio?
I mean, I'm not sure how you can get 40 GBit/s with 4x PCIE 3.0 in the first place, every quote I find says 32 GBit/s. Maybe there is that much overhead in Thunderbolt.
But surely 4x40 Gbit/s would require 16 lanes at least. I don't think Intel makes any consumer CPUs with more than 16.
I've got an ivybridge i7 with 40 lanes right now in my system.
My understanding is that that's total bandwidth across all protocols. So the mix of Displayport and PCIe 3.0 can't exceed 40 GBit/s. The 4x PCIe 3.0 on it's own is 32 Gbit/s, as you mentioned.
Each controller provides two Thunderbolt ports, which share bandwidth. For the 15", 4x PCIe to the left side Thunderbolt controller, 4x PCIe to the right side Thunderbolt controller, and 8x to the GPU would be a sensible configuration. Though who knows if Apple took this approach.
4x Thunderbolt + 4x Thunderbolt + 8x GPU, with everything else on the PCH would make sense for the 15". Or maybe they connected the SSD (also 4x PCIe) to the CPU, and one of the Thunderbolt controllers to the PCH.
Hopefully they used the full set of CPU lanes. Most laptop manufacturers have a tendency to under utilize the CPU lanes and put things on the bandwidth constrained PCH for some reason.
It’s just not your problem because, really, how many people are going to be inconvenienced by the right Thunderbolt ports being slightly slower than the left Thunderbolt ports?
In the end, what's really going to dictate how this shakes out is what chipset manufacturers decide to do. And there aren't as many of those as there used to be. Most likely, eventually, all intel chipsets are going to do thunderbolt 3 over usb type-c and everyone else will follow.