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I feel like there's so much momentum around RISCV recently, it should really take off... These guys have just completed bringup of their first Cortex M0-like RISCV implementation:

http://hackaday.com/2016/10/10/the-journey-toward-a-complete...

And are thinking about crowdfunding an open Arduino-like platform based around it. I can't wait!

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Similarly, lowRISC are planning to put together a RISC-V SoC:

http://www.lowrisc.org/

Fedora/RISC-V should run on the lowRISC chips, but probably won't ever work on the embedded ones. We're targeting RV64G (64 bit RISC-V, with general purpose extensions) and given that it's a Linux server/desktop environment it also requires a fair amount of RAM.

We're not building any 32 bit binaries at all.

just. awesome. (+1 on no 32 bit).

looking forward to playing with this when you are ready.

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