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I thought the reason it was generally accepted that the 8-bit lookup table is optimal is because it can fit in the L1 cache.

(Very) embedded developer speaking here. What's this L1 cache you speak of?

It's level 1 CPU cache, the fastest (and smallest) cache.

It caches both instructions and data.

GP is making the point that not all CPUs have a cache.

It was a joke. Some embedded processors lack a cache.