Instead of memorizing tables, it would be more valuable to programmers to read how these numbers come to be in the first place. An excellent, and much longer read, is by Ulrich Drepper[1].
https://www.akkadia.org/drepper/cpumemory.pdf
Need to supplement this excellent article with Row Hammer information. It doesn't cover clflush. I sent the author a note.
All the timings are a little faster, the caches a little bigger, and the buses a little wider, but it's still basically the same stuff with different names.
P.S. What’s I dislike most about the article, it fails to explain why L3 cache is 10-20 times slower than L1 cache, while they both made from SRAM.
Why is it? Is it because L3 is usually shared?
The best explanation I saw is this: https://fgiesen.wordpress.com/2016/08/07/why-do-cpus-have-mu...
On the date of publication and rapid changes in tech world. It might be a bit older but the generic concepts are still great to learn if you only heard the terms before but don't know the details.