Building a CPU from Scratch: Jcore Design Walkthrough [video]

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85 points·adamnemecek··8 comments

Why is it hard to implement USB 2.0 on an FPGA? (See the 22:40 mark of the video for context.)

Well, if you want to fully implement the USB PHY on a FPGA: it's impossible, you need high speed circuits which can only be implemented in ASIC (such as PLL, VCO, DCO, etc).

If you want to reuse the already existent USB PHY in the FPGA, you would need to implement the whole USB hardware stack, which requires deep knowledge of the spec, and a lot of time and effort to get it right.

Let me rephrase the question: why is USB 2.0 so much harder to do in an FPGA than USB 1.1?

My understanding is that USB 1.1 is slow enough that you can get away without a analog/mixed signal PHY. I have not done it personally but I've read that you can even do USB 1.1 by bit-banging with a cheap micro controller.

Bit-banging is definitely possible. The Digispark, which is a tiny Arduino-alike, does this. It comes on a small board with contacts on one side that can plug into a USB port. The data lines are connected directly to two of the IO pins of the microcontroller, which then handles USB stuff directly. This makes for a small and cheap package, although the tradeoff is that you can't use those IO pins for USB if you want them for something else, and the USB doesn't work if you reduce the microcontroller's clock speed.

Links I found interesting:

http://www.beyondlogic.org/usbnutshell/usb2.shtml

http://electronicdesign.com/boards/480-mbitss-signal-integri...

(neither explicitly discusses FPGA USB 2.0 implementations)

Just the fact they make use of VHDL and Clojure makes me wish that they get very successful.

Very interesting presentation of the current work.

The non-video version: https://news.ycombinator.com/item?id=12103471

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