Shrug. It's okay, but there's still a lot of passives floating around on that reference design.

By contrast, some of the Freescale Cortex parts don't even need crystals to run USB (they use the USB signalling to tighten up the on-chip PLL/VCO). And they don't need capacitors on the crystal pins. So, you can use one of those Cortex parts with basically a USB connector, a switching power supply chip, some bypass caps AND THAT'S IT.

I also really don't understand why nobody integrates the ethernet PHY at this point. It would change from 20 pins to something like 5 pins.

Microchip has had a PIC18F97J60 for years. Why is nobody else doing this in the more advanced SoC's?