Non-blocking synchronization
en.wikipedia.org
en.wikipedia.org
I've been thinking along the lines of a DSL for such algorithms that can compile down to whatever language you need, but also easily lends itself to static analysis for verification, but I feel my lack of classical CompSci training is letting me down here a bit.
http://video.google.com/videoplay?docid=2139967204534450862#
(Cliff Click was architect and lead developer for the HotSpot server JIT compiler.)
Personally, I think that hardware transactional memory can't come fast enough. We're already seeing a basic form of it on Sun's to-be-released Rock processor, but there are much more advanced types of HTM that have been developed in the past few years. With hardware support, the performance penalty of using transactional memory pretty much evaporates. The hardware doesn't have to be too terribly elaborate, either.