The smaller your transistors get, the more errors you get per square inch of silicon wafer so in order to make ends meet as the manufacturing gets more and more expensive, you have to do a lot of tricks.

Tiny errors that are within a single processor can usually be fixed by disabling some cores or features and downgrading the SKU (i7 sold as i5). However, big errors are extremely costly and a few can wipe out the yield and profitability on a wafer.

If you have, for example, two 1x1 in processors on a wafer and a scratch stretching two adjacent corners of those processors, you lose both processors. If the scratch is diagonal and at the boundary between three or four processors, you would lose them all. If, however, those 1x1in units are split into .5x.5in ones, even your worst errors are unlikely to destroy the entire 2 sq in surface.

The difference in size isn't as drastic as in my example, but there are many other factors that impact yield and chip size is one of the most impactful ones (everything else being equal)